With electronic designs becoming smaller and smaller it is more and more important to be aware of and able to fix current density and electromigration errors sooner in the design flow. This requires current estimation in each wire of a design. Usually, tools need a fully routed net to be able to extract the current that goes through each wire, however estimating the current in each wire of a partially routed net is a complex problem. On a partially routed net, it is not possible to know what the future connections of a wire may be and how many terminals it will connect with. A future connection might completely change the net topology and the current that goes through a wire. Furthermore, to be able to propagate the current in every wire of a net, a designer needs to have the sum of all terminals current equal to zero in order to satisfy the Kirchhoff's current laws, which is not the case until the net is fully routed and connected to all terminals.